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Per-Erik Hellström is a Professor at KTH Royal Institute of Technology, specializing in semiconductor process technology with a particular focus on heterogeneous integration of materials and devices, including silicon CMOS technology. His research includes the development of advanced techniques for fabricating nanometer-sized transistors using double patterning. Hellström's work encompasses the integration of new materials such as Silicon Germanium (SiGe), Germanium (Ge), high-k dielectrics, and metal gates with the goal of enhancing future CMOS technologies through innovations like sequential 3D integration. He leads the KTH FDSOI CMOS process circuit technology and manages the Si-SiC process line at the Electrum Laboratory, ensuring maintenance, process control, and tool upgrades. He is actively involved in teaching and examining various courses in electrical circuits, semiconductor devices, and nanotechnology at both Bachelor's and Master's levels, including the degree project in Engineering Physics with a specialization in Nanotechnology.
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